Recent

• June 2011 - Doulos
  Doulos Solutions Workshop: Easier UVM - functional verification for mainstream designers (PDF)
• June 2011 – Accellera @ DAC
  Universal Verification Methodology (UVM): Verifying Blocks to IP to SOCs and Systems (PDF)
• June 2011 – STMicroelectronics @ DVClub
  Challenges in using UVM at SoC level (PDF)
• June 2011 – Agnisys @ DVClub
  UVM Update: Register Package (PDF)
• March 2011 – Doulos @ DVCon
  Easier UVM for Functional Verification by Mainstream Users (PDF)
• March 2011 – Sunburst & Mentor @ DVCon
  OVM & UVM Techniques for Terminating Tests (PDF)
• March 2011 – Paradigm Works @ DVCon
  SystemVerilog FrameWorks™ Scoreboard: An Open Source Implementation Using UVM (PDF)
• March 2011 – Verilab @ DVCon
  First Reports from the UVM Trenches: User-friendly, Versatile and Malleable, or Just the Emperor's New Methodology? (PDF)
• March 2011 – Cadence @ DVCon
  So There's My Bug! Debugging Universal Verification Methodology (UVM) Environments (PDF)
• March 2011 – Mentor @ DVCon
  Interactive Command Line Debug Using UVM Sequences (PDF)
• March 2011 – SpringSoft @ DVCon
  UVM Transaction Recording Enhancements (PDF)
• March 2011 – Mentor & Synopsys @ DVCon
  TLM2 in UVM (PDF)
• March 2011 – Mentor & Intel @ DVCon
  Advanced Testbench Configuration Using Resources (PDF)
• March 2011 – Mentor @ DVCon
  Are Macros in OVM & UVM Evil? – A Cost-Benefit Analysis (PDF)
• March 2011 – Mentor & Xilinx @ DVCon
  Parameters and OVM – Can't They Just Get Along? (PDF)
• March 2011 – Synopsys & Qualcomm @ DVCon
  From the Magician's Hat: Developing a Multi-methodology PCIe Gen2 VIP (PDF)
• March 2011 – Cadence & LSI @ DVCon
  UVM-MS: Metrics Driven Verification of Mixed Signal Designs (PDF)
• February 2011 - Doulos
  Doulos Easier UVM Workshop
• February 2011 - Doulos
  Easier UVM for Functional Verification by Mainstream Users

• 2010
  • October 2010 - Synopsys
    Structured Verification with UVM Register Abstraction(PDF)
  • October 2010 - Mentor Graphics
    UVM Register Use Models(PDF)
  • August 2010 - Cadence
    Comprehensive UVM/OVM Acceleration(PDF)
  • June 2010 - Aldec @ DAC
    OVM/UVM for FPGAs: The End of Burn and Churn(PDF)
  • June 2010 - Aldec
    Getting Started with OVM/UVM Using Rivera-PRO(PDF)
  • June 2010 - Accellera @ DAC
    UVM VIP-TSC Status(PDF)
  • June 2010 - Doulos
    UVM Verification Primer
  • June 2010 - Doulos
    From OVM to UVM: Getting Started with UVM - A First Example
  • June 2010 - Doulos
    Easier UVM - for VHDL and Verilog Users
  • June 2010 - intelligentDV
    Doxygen Documentation of UVM Library
  • May 2010 - TestBench.in
    UVM Tutorial
  • May 2010 - TestBench.in
    Easy Labs: UVM