Why is UVM the Universal Verification Methodology?

The Universal Verification Methodology, UVM, is a standard being developed by Accellera for the expressed purpose of fostering universal verification IP interoperability. Led by electronics companies and supported by a suite of companies representing the breadth of the verification ecosystem, the UVM will increase productivity by eliminating expensive interfacing that slows verification IP reuse.

UVM Overview Graphic

When is it available?

The UVM 1.0 Early Adopter (EA) is available for download from Accellera beginning May 17, 2010.

Background

As the verification challenge has grown during the past decade, several solutions emerged to address both complexity and reuse. Each one had its own value and niche resulting in project success but also leading to divergence in the verification ecosystem. In January 2008 the OVM, Open Verification Methodology, emerged and helped usher a convergence around two main solutions VMM and OVM. Accellera created the Verification IP Technical Subcommittee (VIP TSC) in February 2008 to first work on interoperability between these two solutions and then to address a single solution. Accellera achieved the first milestone in July 2009 with the release of the Interoperability Best Practices and reference library. The UVM 1.0 EA is the first delivery of the second milestone.

UVM 1.0 EA is based on the OVM 2.1.1 release and incorporates some incremental functionality to validate the SourceForge-based development process. The incremental functionality comes from a collaboration of VMM, OVM, and new technology developed by the Accellera VIP TSC. Along with the base-class library (BCL), the UVM 1.0 EA provides two important documents – a reference manual to the APIs in UVM and a user guide suggesting how to apply UVM – both of which originated with the OVM but are updated to UVM. Accellera members have tested the UVM 1.0 EA is on multiple simulators to enable the verification IP developed with it to run universally.

The UVM 1.0 EA achieved something many people doubted could be done: release the UVM in any form. Even those who thought UVM was possible believed it would devolve into the lowest common denominator, but the reality of UVM 1.0 EA refutes that notion. The Accellera VIP should be congratulated for proving that true industry collaboration is not only achievable but can build remarkable technology. With EA we are just starting on a path that will raise productivity throughout the verification ecosystem.

Key Benefits

• Eliminates need for interoperability among verification libraries
• Based on a BCL proven in 1000s of projects
• Incorporates the collective verification knowledge of the Accellera members
• Written in IEEE 1800 SystemVerilog
• Runs on any simulator supporting the IEEE 1800 standard
• True open-source license agreement (Apache 2.0)

New Features in UVM 1.0 EA

• Callbacks and end-of-test from OVM extended
• To enable registration by type simplifying the coding of callbacks
• With a new API to support a report catcher to demote specific messages based on user-defined criteria
• With a new callback to enable the end-of-test mechanism to identify when a component raise or drops an objection
• With new callbacks for raised, dropped, all_dropped
• A heartbeat mechanism to provide a central watchdog feature